Side Channel Resistant Novel Multi Mode Memory PUF Design for Key Generation and Dual Authentication for IoT

Abstract

The paper presents support for multiple security functions; the architecture incorporates a mode-selection mechanism that enables two distinct operating configurations within the same hardware platform. In the Weak Mode (W-mode), fixed control patterns are applied, and the Linear Feedback Shift Register (LFSR) is bypassed, allowing intrinsic responses to be generated for cryptographic key derivation without requiring external challenges. This approach significantly reduces exposure to challenge–response pair (CRP) collection attacks. In the Strong Mode (S-mode), externally supplied challenges are received through a UART interface and expanded using a 32-bit maximal-length LFSR governed by the primitive polynomial (x³² + x²² + x² + x¹ + 1) producing a sequence period of (2³²− 1) (approximately (4.3 × 10⁹)). The resulting bit stream controls the LUT inputs, creating a large effective CRP space suitable for authentication applications. The proposed PUF was implemented on Xilinx Artix-7 FPGA devices using DONT TOUCH and LOC constraints to preserve routing symmetry and maintain consistent delay characteristics. Experimental evaluation conducted on ten FPGA boards over a temperature range of (−40 ^○C to 80 ^○C) demonstrates excellent statistical performance, achieving 49.96% uniqueness and 49.87% uniformity. Reliability testing shows a worst-case bit error rate of only 0.41% and an overall reliability of 99.59%. Independent characterization of both operating modes confirms compliance with established PUF quality metrics. Authentication experiments further demonstrate clear distinction between genuine and counterfeit devices. In addition, a fuzzy-extractor framework based on a BCH (255,223) error-correcting code enables secure key regeneration with a reconstruction failure probability below (). Resistance against machine-learning-based modeling attacks was assessed using logistic regression, support vector machine (SVM), and feed-forward neural network classifiers trained with 20,000 CRPs. The highest attack success rates observed were 6% for the 8-stage design and 2% for the 16-stage design, indicating strong resilience against predictive cloning attempts. Owing to its low hardware overhead, placement-controlled implementation, dual-mode flexibility, and strong security performance, the proposed architecture represents an effective hardware root of trust for secure embedded IoT applications.